STM8L052中PVD的相关翻译
6.4 Programmable voltage detector (PVD)
The device features an embedded programmable voltage detector (PVD) that monitors the VDD/VDDA power supply and compares it to the VPVD threshold.
When VDD/VDDA drops below the VPVD threshold and/or when VDD/VDDA rises higher than the VPVD threshold, the PVD output changes and a PVD event is generated. Every PVD event sets the interrupt flag (PVDIF) in the PWR_CSR1 register. The current state of the PVD output can be monitored through the PVDOF flag status in the PWR_CSR1 register. If the PVDIEN bit in the PWR_CSR1 register is set, the PVD interrupt is enabled and is generated when the PVDIF flag is set. To prevent some spurious interrupts, as the PVDIF flag must be cleared by software, the user must make sure the PVDIF flag has been cleared before the PVD interrupt is enabled and before returning from the interrupt service. The PVD is enabled by software by setting the PVDE bit in the PWR_CSR1 register.
设备功能监视 VDD/VDDA 电源嵌入式可编程电压探测器 (PVD) 供应和将它与 VPVD 阈值进行比较。当 VDD/VDDA 低于 VPVD 阈值及 / 或 VDD/VDDA 升高不超过 VPVD 阈值,PVD 输出变化和生成 PVD 事件。每个 PVD 事件设置中断标志 (PVDIF) 在 PWR_CSR1 寄存器中。可以通过 PWR_CSR1 寄存器中的 PVDOF 标志状态监测 PVD 输出的当前状态。如果设置 PWR_CSR1 寄存器中的 PVDIEN 位,PVD 中断启用,并设置 PVDIF 标志时生成。若要防止一些虚假的中断,如 PVDIF 标志必须由软件清除,用户必须确保 PVDIF 标志已被清除的 PVD 中断已启用再之前返回从中断服务。PVD 被启用的软件,通过设置 PVDE 位在 PWR_CSR1 寄存器中。此 PVD 有 7 个不同水平之间 1.85 V 和 3.05 V,选定的 PLS
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